Renesas SH7709S Manuale Utente

Rev. 5.00, 09/03, page 483 of 760

Start of transmission/reception

Read TDRE bit in SCSSR

All data

transmitted/received?

End of transmission/reception

(1)

No

Yes

TDRE = 1?

Write transmit data to SCTDR

and clear TDRE bit in SCSSR to 0

RDRF = 1?

No

Yes

Yes

No

Read ORER bit in SCSSR

Error processing

(2)

ORER = 1?

No

Read RDRF bit in SCSSR

(4)

Yes

(3)

Read receive data from SCRDR 

and clear RDRF bit in SCSSR to 0

Clear TE and RE bits

in SCSCR to 0

Notes: 1.

2.

Numbers in parentheses refer to steps in the preceding procedure description.
In switching from transmitting or receiving to simultaneous transmitting
and receiving, clear both TE and RE to 0, then set both TE and RE to 1 simultaneously.