Intel Pentium 4 M RH80532GC029512 Manuale Utente
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RH80532GC029512
System Bus Signal Quality Specifications
52
Mobile Intel
Pentium
4 Processor-M Datasheet
3.2
System Bus Signal Quality Specifications and
Measurement Guidelines
Measurement Guidelines
Various scenarios have been simulated to generate a set of AGTL+ layout guidelines which are
available in the Mobile Intel
available in the Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset
Platform Design Guide.
simulating signal quality at the processor core silicon (pads).
Mobile Intel Pentium 4 Processor-M maximum allowable overshoot and undershoot specifications
for a given duration of time are detailed in
for a given duration of time are detailed in
through
bus ringback tolerance for low-to-high transitions and
shows ringback tolerance for
high-to-low transitions.
NOTES:
1. All signal integrity specifications are measured at the processor silicon (pads).
2. Unless otherwise noted, all specifications in this table apply to all Mobile Intel Pentium 4 Processor-M
2. Unless otherwise noted, all specifications in this table apply to all Mobile Intel Pentium 4 Processor-M
frequencies.
3. Specifications are for the edge rate of 0.3 - 4.0 V/ns.
4. All values specified by design characterization.
5. Please see
4. All values specified by design characterization.
5. Please see
for maximum allowable overshoot.
6. Ringback between GTLREF + 10% and GTLREF - 10% is not supported.
7. Intel recommends simulations not exceed a ringback value of GTLREF +/- 200
7. Intel recommends simulations not exceed a ringback value of GTLREF +/- 200
mV to allow margin for other
sources of system noise.
Figure 25. BCLK Signal Integrity Waveform
Crossing
Voltage
Threshold
Region
VH
VL
Overshoot
Undershoot
Ringback
Margin
Rising Edge
Ringback
Falling Edge
Ringback,
BCLK0
BCLK1
Crossing
Voltage
Table 28. Ringback Specifications for AGTL+ and Asynchronous GTL+ Signal Groups
Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
All Signals
0
→
1
GTLREF + 10%
V
1,2,3,4,5,6,7
All Signals
1
→
0
GTLREF - 10%
V
1,2,3,4,5,6,7