Seagate Ultra 160 Manuale Utente

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Parallel SCSI Interface Product Manual, Rev. A                                        
   73
The SCSI target port shall begin pacing transfers only after meeting all the following:
• signal restrictions between information transfer phases listed in Section 3.10;
• the signal restrictions between a RESELECTION phase and a DT DATA IN phase listed in Section 3.3.2; or
• the signal restrictions between a SELECTION phase and a DT DATA OUT phase listed in Section 3.2.1.2.
The SCSI initiator port shall begin pacing transfers by:
• simultaneously with the assertion of ACK the SCSI initiator port shall begin asserting and negating P1 at 
twice the negotiated transfer period (e.g., 12.5 ns for Fast-160);
• SCSI initiator port shall assert and negate P1 at least 8 times (e.g., (2 x 6.25 ns) x 8 = =100 ns at Fast-160); 
and
• the SCSI initiator port may establish a data valid state as described in Section 3.5.3.2.
3.5.3.2.3
Ending pacing transfers
After transmitting the last data word of a DT DATA IN phase, the SCSI target port shall end pacing by waiting 
for all REQs to be responded to by ACKs then negate the REQ and P1 signals. After the SCSI target port stops 
asserting and negating REQ, it shall not assert REQ again until the requirements in Section 3.10 are met.
After transmitting the last data word of a DT DATA OUT phase, the SCSI initiator port shall:
• continue asserting and negating the ACK and P1 signals until it detects a change to the C/D, I/O, or MSG 
signals; and
• negate the ACK and P1 signals within 200 ns of detecting a change to the C/D, I/O, or MSG signals.
When the SCSI target port changes from a DT DATA OUT phase to any other phase it shall wait at least a bus 
settle delay plus a data release delay before asserting REQ and shall ignore any ACK transitions for at least a 
bus settle delay plus a data release delay after transitioning the C/D, I/O, or MSG signals.
3.5.3.3
Paced information unit transfer
Information units shall be transferred on the DT DATA OUT phase and the DT DATA IN phase, and the infor-
mation units’ embedded iuCRC shall be used to detect information unit data errors.
If the I/O signal is true (i.e., transfer to the SCSI initiator port) and the phase of the P1 signal indicates data is 
valid, to transfer SPI information units the SCSI target port:
(a) shall drive the DB(15-0) signals to their values simultaneous with the next REQ signal assertion;
(b) shall hold the DB(15-0) signals valid for a minimum of one transmit hold time;
(c) shall drive the DB(15-0) signals to their values simultaneous with the next REQ signal negation; 
and
(d) shall hold the DB(15-0) signals valid for a minimum of one transmit hold time.
If the I/O signal is true (i.e., transfer to the SCSI initiator port), to receive SPI information units the SCSI initiator 
port shall:
(a) read the value on the DB(15-0) signals within one receive hold time of the transition of the REQ 
signal; and
(b) respond with an ACK signal assertion after each REQ assertion/negation pair.
If the I/O signal is false (i.e., transfer to the SCSI target port) and the phase of the P1 signal indicates data is 
valid, to transfer SPI information units the SCSI initiator port:
(a) shall wait until detecting a REQ assertion;
(b) shall drive the DB(15-0) signals to their values simultaneous with the next ACk signal assertion;
(c) shall hold the DB(15-0) signals valid for a minimum of one transmit hold time;
(d) shall drive the DB(15-0) signals to their values simultaneous with the next ACK signal negation;