Emerson PMPPC7448 Manuale Utente

 Cache Memory

PmPPC7448 User’s Manual

L2 Hardware Flush
0 Flush  disabled
1 Flush enabled

LVRAM enable
0 LVRAM mode disabled
1 LVRAM  mode  enabled

LVRAM mode (read-only)
000 Reserved if LVRAM mode is enabled
001 Mode 1
010 Mode 2
011 Mode 3
100 Mode 4
101 Mode 5
110 Mode 6
111 Mode 7

The L2 cache is cleared following a power-on or hard reset. Before enabling the L2 cache, 
configuration parameters must be set in the L2CR and the L2 tags must be globally invali-
dated. Initialize the L2 cache during system start-up per the following sequence:

1

Power-on reset (automatically performed by the assertion of HRESET* signal).

2

Disable interrupts and dynamic power management (DPM).

3

Disable L2 cache by clearing L2CR[L2E].

4

Perform an L2 global invalidate.

5

Enable the L2 cache for normal operation by setting the L2CR[L2E] bit to 1.