Emerson PMPPC7448 Manuale Utente

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8-1
Section 8
Serial Input/Output
MULTI-PROTOCOL SERIAL CONTROLLERS (MPSC)
The MV64460 has two MPSCs with each channel supporting HDLC, BISYNC, UART, or Trans-
parent protocols.
Signals Routing:
The two MPSCs can be routed to serial port 0 and serial port 1, or not connected. These are 
defined in the Main Routing register (MRR).
MPSCx Main Configuration Registers:
Each MPSC has an MPSC Main Configuration register (MMCRx) for port 0 and port 1. The 
MMCRx is a 64-bit register that configures common MPSC features and is protocol indepen-
dent. Each MMCRx consists of two 32-bit registers, MMCRLx (low) and MMCRHx (high).
SERIAL DMA (SDMA) CHANNELS
Two of the SDMA channels support data movement between the MPSCs and memory buff-
ers on the MV64460. Each channel consists of a DMA engine for receiving and one for trans-
mitting. The SDMA uses a linked chain of descriptors and buffers to reduce CPU overhead.
PROGRAMMABLE BAUD RATE
The MV64460 has two programmable baud rate generators (BRG); each with five clock 
inputs: BClkIn, TClk, SCLK, TSCLK, and CLKSel.
BRGx Configuration Register
When a BRG is enabled, it loads the Count Down Value (CDV) from the BRG configuration 
register into its count down counter. When the counter expires (reaches zero), the BRG 
clock output (BCLK) is toggled and the counter reloads.
Note:
The EIA-232C specification defines a maximum rate of 20,000 bits per second over a typical 50-foot cable 
(2,500 picofarads maximum load capacitance). Higher baud rates are possible, but depend specifically upon 
the application, cable length, and overall signal quality.