NEC PD750008 Manuale Utente

Masked ROM

0000H - 1F7FH

(8064 x 8 bits)

75X standard CPU

31.3 ms

0.95, 1.91, 15.3 µs
(when operating at
4.19 MHz)

NC

P21

Not provided

000H - 0FFH

2-byte stack

Not available

3 machine cycles

2 machine cycles

Item

Program memory

Data memory

CPU

Oscillation settling time

When selecting the main
system clock

When selecting the subsys-
tem clock

20 (CU)

38 (GB)

24 (CU)

42 (GB)

6 - 9 (CU)

23-26 (GB)

SBS register

Stack area

Stack operation for a
subroutine call instruction

BRA !addr1
CALLA !addr1

MOVT XA, @BCDE
MOVT XA, @BCXA
BR BCDE
BR BCXA

CALL !addr

CALLF !faddr

(1/2)

Instruction

execution time

Pin connection

Stack

Instruction

µPD75008

µPD750008

µPD75P0016

P33 - P30

122 µs (when operating at 32.768 kHz)

One-time PROM

0000H - 3FFFH

(16384 x 8 bits)

V

PP

P33/MD3 - P30/MD0

Masked ROM

0000H - 1FFFH

(8192 x 8 bits)

000H - 1FFH

(512 x 4 bits)

75XL CPU
(equivalent to the 75X high-end CPU)

2

15

/f

X

, 2

17

/f

X

 (select-

Fixed to 2

15

/f

X

able by a mask option)

• 0.95, 1.91, 3.81, 15.3 µs (when operating at 4.19

MHz)

• 0.67, 1.33, 2.67, 10.7 µs (when operating at 6.0 MHz)

IC

P21/PTO1

Provided SBS.3 = 1 : Mk I mode selection

SBS.3 = 0 : Mk II mode selection

n00H - nFFH (n = 0, 1)

Mk I mode:  2-byte stack
Mk II mode:  3-byte stack

Mk I mode:  Not available
Mk II mode:  Available

Available

Mk I mode:  3 machine cycles, Mk II mode:  4
machine cycles

Mk I mode:  2 machine cycles, Mk II mode:  3
machine cycles