NEC PD17062 Manuale Utente
78
µ
PD17062
9.7 INTNC (0FH, b
0
)
The INT
NC
flag is used for reading the INT
NC
pin state.
The flag indicates 1 when a high level signal is input to the INT
NC
pin, and 0 when a low level signal is input
to the INT
NC
pin.
9.8 HORIZONTAL SYNCHRONIZING SIGNAL COUNTER CONTROL (11H, 12H)
b
3
b
2
b
1
b
0
0
INTVSYN
INTNC
0FH
0
0
1
0
1
The V
SYNC
pin is low level.
The V
SYNC
pin is in the high level period.
The INT
NC
pin is low level.
The INT
NC
pin is high level.
b
3
b
1
b
0
HSCGOSTT
0
12H
0
0
1
b
3
b
2
b
1
b
0
HSCGT3
HSCGT2
HSCGT0
11H
HSCGT1
0
0
1
1
0
1
0
1
0
b
2
Input confirmation of gate open/close of
horizontal synchronizing signal counter
horizontal synchronizing signal counter
Both bits are fixed at 0.
Gate close
Gate open
Gate open (1.69 ms interval)
Not to be set
Gate close
Gate open
Setting of horizontal synchronizing signal counter