NEC PD75402A Manuale Utente
CHAPTER 2. PIN FUNCTIONS
12
Dual-Function Pin
P10
P12
P03
P02/SB0
P01
P02/SO
P22
2.1.2
List of Pins Other Than Port Pins
Table 2-2 List of Pins Other than Port Pins
Pin Name
INT0
INT2
SI
SO
SCK
SB0
PCL
X1, X2
RESET
V
DD
V
SS
NC*
8
Functions
An edge-detected vectored interrupt request input pin (detected
edge selectable by mode register).
Built in with the noise eliminator by the sampling clock.
An edge detected external test input pin (rising edge detection).
A serial data input pin.
A serial data output pin.
A serial clock input/output pin.
A serial bus input/output pin.
A clock output pin.
A system clock oscillation crystal/ ceramic resonator connection
pin. If supplying the clock from the exterior, input to X1 and input
the inverted phase to X2.
A system reset input pin. Built in with the noise eliminator by
analog delay.
A positive power supply pin.
A GND potential pin.
No Connection
Input/Output
Input
Input
Input
Input/output
Input/output
Input/output
Input/output
Input
Input
Remarks
For the status of each pin at reset, see CHAPTER 8 “RESET FUNCTION”.
*
If using the
µ
PD75P402 and the printed circuit board commonly, the NC pin should be connected directly to V
SS
.