NEC PD75402A Manuale Utente
15
CHAPTER 2. PIN FUNCTIONS
V
DD
V
DD
X1
X2
PD75402A
µ
Crystal Resonator
or Ceramic Oscillator
or Ceramic Oscillator
X1
X2
PD74HC04
µ
External
Clock
Clock
(Standard 4.194304 MHz)
PD75402A
µ
2.2.7
X1, X2 (Crystal)
The built-in clock oscillation crystal/ceramic input.
It is also possible to supply the clock from the exterior.
(a) Crystal/Ceramic Oscillation
(b) External Clock
2.2.8
RESET (Reset)
A low level active system reset input pin. It has Schmitt-triggered input and is built in with the noise eliminator
by analog delay.
It has asynchronous input for RESET. It accepts a signal having a certain low-level width irrespective of the CPU’s
operation clock if one is input and system reset is effected under priority over any other operation.
2.2.9
V
DD
A positive power supply pin.
2.2.10 V
SS
A GND potential pin.