NEC PD750004 Manuale Utente

The three-wire serial I/O mode is compatible with other modes used in the 75 XL series, 75X series,

µPD7500 series, and 87AD series.

Communication is performed using three lines:

Serial clock (SCK), serial output (SO), and serial input (SI).

Remark The µPD750008 can also be used as a slave CPU.

To set the three-wire serial I/O mode, manipulate the following two registers:

• Serial operation mode register (CSIM)

• Serial bus interface control register (SBIC)

To use the three-wire serial I/O mode, set CSIM as shown below.  (For details on CSIM format, see

(1) in Section 5.6.3.)

CSIM0 is manipulated using an 8-bit manipulation instruction.  Bits 7, 6, and 5 of CSIM can be

manipulated bit by bit.

When the RESET signal is input, CSIM is set to 00H.

In the figure below, hatched portions indicate the bits used in the three-wire serial I/O mode.

Remark (R):

Read only

(W):  Write only

SCK

Master CPU

SO

SI

Slave CPU

SCK

SI

SO

CSIE

COI

WUP

CSIM4 CSIM3 CSIM2 CSIM1 CSIM0

FE0H

CSIM

7

6

5

4

3

2

1

0

Address

Serial clock selection bit (W)

Serial interface operation mode selection bit (W)

Wake-up function specification bit (W)

Match signal from address comparator (R)

Serial interface operation enable/disable specification bit (W)