NEC PD750004 Manuale Utente
144
µPD750008 USER'S MANUAL
SCK
Master CPU
(µPD750008)
SB0, SB1
Slave CPU
SCK
SB0, SB1
V
DD
2-wire serial I/O
2-wire serial I/O
<Sample program> (master side):
CLR1
MBE
MOV
XA,#10000011B
MOV
CSIM,XA
; Set transfer mode
MOV
XA,TDATA
MOV
SIO,XA
; Set transfer data, and start transfer
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LOOP : SKTCLR
IRQCSI
; Test IRQCSI
BR
LOOP
MOV
XA,SIO
; Read in receive data
5.6.6 Two-Wire Serial I/O Mode
The two-wire serial I/O mode can be made compatible with any communication format by programming.
In this mode, communication is basically performed using two lines: Serial clock (SCK) and serial data input/
output (SB0 or SB1).
Figure 5-47. Example of Two-Wire Serial I/O System Configuration
Remark The µPD750008 can also be used as a slave CPU.
(1) Register setting
To set the two-wire serial I/O mode, manipulate the following two registers:
• Serial operation mode register (CSIM)
• Serial bus interface control register (SBIC)