Omega OMB-DAQBOARD-3000 Manuale Utente
P2C, DAC, or Timer Update Latency
Setpoints allow DACs, timers, or P2C digital outputs to be updated very quickly. Exactly how fast an
output can be updated is determined by the following three factors:
output can be updated is determined by the following three factors:
o
scan rate
o
synchronous sampling mode
o
type of output to be updated
Example:
We set an acquisition to have a scan rate of 100 kHz. This means each scan period is 10µs. Within
the scan period we will sample six analog input channels. These are shown in the following figure as
Channels 1 through 6. The ADC conversion occurs at the beginning of each channel’s 1µs time block.
the scan period we will sample six analog input channels. These are shown in the following figure as
Channels 1 through 6. The ADC conversion occurs at the beginning of each channel’s 1µs time block.
Example of P2C or DAC Latency
If we apply a setpoint on analog input Channel 2, then that setpoint will get evaluated every 10µs with
respect to the sampled data for Channel 2.
respect to the sampled data for Channel 2.
Due to the pipelined architecture of the Analog-to-Digital Converter system, the setpoint cannot be
evaluated until 2µs after the ADC conversion. In the example above, the P2C digital output port can be
updated no sooner than 2µs after Channel 2 has been sampled, or 3µs after the start of the scan. This 2µs
delay is due to the pipelined ADC architecture. The setpoint is evaluated 2µs after the ADC conversion
and then P2C can be updated immediately.
evaluated until 2µs after the ADC conversion. In the example above, the P2C digital output port can be
updated no sooner than 2µs after Channel 2 has been sampled, or 3µs after the start of the scan. This 2µs
delay is due to the pipelined ADC architecture. The setpoint is evaluated 2µs after the ADC conversion
and then P2C can be updated immediately.
P2C digital outputs can be updated immediately upon setpoint detection. This is not the case for analog
outputs, as these incur another 3µs delay. This is due to the shifting of the digital data out to the D/A
converter which takes 1µs, plus the actual conversion time of the D/A converter, i.e., another 2µs (worst
case). Going back to the above example, if the setpoint for analog input Channel 2 required a DAC update
it would occur 5µs after the ADC conversion for Channel 2, or 6µs after the start of the scan.
outputs, as these incur another 3µs delay. This is due to the shifting of the digital data out to the D/A
converter which takes 1µs, plus the actual conversion time of the D/A converter, i.e., another 2µs (worst
case). Going back to the above example, if the setpoint for analog input Channel 2 required a DAC update
it would occur 5µs after the ADC conversion for Channel 2, or 6µs after the start of the scan.
When using setpoints to control any of the DAC outputs, increased latencies may occur
if attempting to stream data to DACs or pattern digital output at the same time. The
increased latency can be as long as the period of the DAC pacer clock. For these
reasons, avoid streaming outputs on any DAC or pattern digital output when using
setpoints to control DACs.
if attempting to stream data to DACs or pattern digital output at the same time. The
increased latency can be as long as the period of the DAC pacer clock. For these
reasons, avoid streaming outputs on any DAC or pattern digital output when using
setpoints to control DACs.
6-6 Setpoint Configuration for Output Control
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DaqBoard/3000 Series User’s Manual