Motorola MVME162 Manuale Utente
Board Level Hardware Description
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MVME162 Embedded Controller Installation Guide
1
Memory Options
The following memory options are used on the different versions of MVME162
boards.
boards.
DRAM Options
The MVME162 implementation includes a 1 MB, 4 MB, or 8 MB DRAM option.
The DRAM architecture is non-interleaved for 1 MB and 8 MB; while the 4 MB
architecture is interleaved. Parity protection can be enabled with interrupts or
bus exception when a parity error is detected. DRAM performance is specified
in the section on the DRAM Memory Controller in the MCchip Programming
Model in the MVME162 Embedded Controller Programmer’s Reference Guide.
The DRAM architecture is non-interleaved for 1 MB and 8 MB; while the 4 MB
architecture is interleaved. Parity protection can be enabled with interrupts or
bus exception when a parity error is detected. DRAM performance is specified
in the section on the DRAM Memory Controller in the MCchip Programming
Model in the MVME162 Embedded Controller Programmer’s Reference Guide.
SRAM Options
The MVME162 implementation includes a 512 KB SRAM option. SRAM
architecture is single non-interleaved. SRAM performance is specified in the
section on the SRAM Memory Controller in the MCchip Programming Model
in the MVME162 Embedded Controller Programmer’s Reference Guide. A battery
supplies VCC to the SRAMs when main power is removed. The worst case
elapsed time for battery protection is 200 days.
architecture is single non-interleaved. SRAM performance is specified in the
section on the SRAM Memory Controller in the MCchip Programming Model
in the MVME162 Embedded Controller Programmer’s Reference Guide. A battery
supplies VCC to the SRAMs when main power is removed. The worst case
elapsed time for battery protection is 200 days.
The SRAM arrays are not parity protected.
The MVME162 SRAM battery backup function is provided by a Dallas
DS1210S. The DS1210S supports primary and secondary power sources. When
the main board power fails, the DS1210S selects the source with the highest
voltage. If one source should fail, the DS1210S switches to the redundant
source. Each time the board is powered, the DS1210S checks power sources
and if the voltage of the backup sources is less than two volts, the second
memory cycle is blocked. This allows software to provide an early warning to
avoid data loss. Because the DS1210S may block the second access, the
software should do at least two accesses before relying on the data.
DS1210S. The DS1210S supports primary and secondary power sources. When
the main board power fails, the DS1210S selects the source with the highest
voltage. If one source should fail, the DS1210S switches to the redundant
source. Each time the board is powered, the DS1210S checks power sources
and if the voltage of the backup sources is less than two volts, the second
memory cycle is blocked. This allows software to provide an early warning to
avoid data loss. Because the DS1210S may block the second access, the
software should do at least two accesses before relying on the data.
The MVME162 provides jumpers (on J20) that allow either power source of the
DS1210S to be connected to the VMEbus +5 V STDBY pin or to one cell of the
onboard battery. For example, the primary system backup source may be a
battery connected to the VMEbus +5 V STDBY pin and the secondary source
may be the onboard battery. If the system source should fail or the board is
removed from the chassis, the onboard battery takes over. Refer to Chapter 2
for the jumper configurations.
DS1210S to be connected to the VMEbus +5 V STDBY pin or to one cell of the
onboard battery. For example, the primary system backup source may be a
battery connected to the VMEbus +5 V STDBY pin and the secondary source
may be the onboard battery. If the system source should fail or the board is
removed from the chassis, the onboard battery takes over. Refer to Chapter 2
for the jumper configurations.