Motorola MVME162 Manuale Utente
Board Level Hardware Description
1-20
MVME162 Embedded Controller Installation Guide
1
The access timer logic is duplicated in the VMEchip2 and MCchip ASICs.
Because the local bus timer in the VMEchip2 can detect an offboard access and
the MCchip local bus timer cannot, the timer in the VMEchip2 is used in all
cases except for the version of the MVME162 which does not include the
VMEbus interface ("No-VMEbus-Interface option").
Because the local bus timer in the VMEchip2 can detect an offboard access and
the MCchip local bus timer cannot, the timer in the VMEchip2 is used in all
cases except for the version of the MVME162 which does not include the
VMEbus interface ("No-VMEbus-Interface option").
Local Bus Arbiter
The local bus arbiter implements a fixed priority which is described in the
following table.
following table.
Connectors
The MVME162 has two 96-position DIN connectors: P1 and P2. P1 rows A, B,
C, and P2 row B provide the VMEbus interconnection. P2 rows A and C
provide the connection to the SCSI bus, serial ports, and Ethernet. The
MVME162 has a 20-pin connector J4 mounted behind the front panel. When
the MVME162 board is enclosed in a chassis and the front panel is not visible,
this connector allows the reset, abort, and LED functions to be extended to the
control panel of the system, where they are visible. The serial ports on the
MVME162 are also connected to two 25-pin DB-25 female connectors J9 and
J15 on the front panel. The four IPs connect to the MVME162 by four pairs of
50-pin connectors. Four 50-pin connectors behind the front panel are for
external connections to IP signals. The memory chip mezzanine board is
plugged into two 40-pin connectors.
C, and P2 row B provide the VMEbus interconnection. P2 rows A and C
provide the connection to the SCSI bus, serial ports, and Ethernet. The
MVME162 has a 20-pin connector J4 mounted behind the front panel. When
the MVME162 board is enclosed in a chassis and the front panel is not visible,
this connector allows the reset, abort, and LED functions to be extended to the
control panel of the system, where they are visible. The serial ports on the
MVME162 are also connected to two 25-pin DB-25 female connectors J9 and
J15 on the front panel. The four IPs connect to the MVME162 by four pairs of
50-pin connectors. Four 50-pin connectors behind the front panel are for
external connections to IP signals. The memory chip mezzanine board is
plugged into two 40-pin connectors.
Memory Maps
There are two points of view for memory maps: 1) the mapping of all resources
as viewed by local bus masters (local bus memory map), and 2) the mapping
of onboard resources as viewed by VMEbus Masters (VMEbus memory map).
as viewed by local bus masters (local bus memory map), and 2) the mapping
of onboard resources as viewed by VMEbus Masters (VMEbus memory map).
The memory and I/O maps which are described in the following tables are
correct for all local bus masters. There is some address translation capability in
the VMEchip2. This allows multiple MVME162s on the same VMEbus with
different virtual local bus maps as viewed by different VMEbus masters.
correct for all local bus masters. There is some address translation capability in
the VMEchip2. This allows multiple MVME162s on the same VMEbus with
different virtual local bus maps as viewed by different VMEbus masters.
Table 1-2. Local Bus Arbitration Priority
Device
Priority
Note
LAN
0
Highest
SCSI
1
...
VMEbus
2
Next Lowest
MC68xx040
3
Lowest