NEC V850/SF1 Manuale Utente

User’s Manual  U15447EJ1V0UM

Differences between the signal lines of the target device and the signal lines of the IE-703079-MC-EM1 target

interface circuit are described in this chapter.

The target device is a CMOS circuit, whereas the target interface circuit of the IE-703079-MC-EM1 is configured

with an emulation circuit such as a gate array TTL or CMOS-IC.

When debugging the IE system connected to the target system, the IE system emulates as if the real target device

is operating on the target system.

Small differences occur however, because the IE system is emulating actual operation.

(1) Signals input/output to/from the emulation CPU 

µPD70F3079Y

(2) Other signals

The IE-703079-MC-EM1 circuit regarding the (1) and (2) signals described above is as follows.

(1) Signals input/output to/from the emulation CPU 

µPD70F3079Y

• P00
•  P07/INTP6 to P01/INTP0
•  P15/SCK1/ASCK0 to P10/SO0/SDA0
•  P27 to P20/SI3/RXD1
•  P34/VM45/TI71 to P30/TI2/TO2
•  P77/ANI7 to P70/ANI0
•  P83/ANI11 to P80/ANI8
•  P107/KR7/TO1 to P100/KR0/TO7

(2) Other signals

• NMI
•  P47/AD7 to P40/AD0
•  P57/AD15 to P50/AD8
•  P65/A21 to P60/A16
•  P96/HLDRQ to P90/LBEN
•  P117/CANRX2 to P110/WAIT
• X1, XT1
• RESET
• CLKOUT
• PORTV

DD

• CPUREG
•  V

PP

/MODE

• X2, XT2
•  GND0, GND1, GND2, PORTGND