NEC PD78P214 Manuale Utente

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Chapter 7   Timer/Counter Units

Eight-bit timer/counter 1 performs count operation by counting up with the count clock specified by the lower
4 bits of prescaler mode register 1 (PRM1).

When the RESET signal is applied, TM1 is cleared to 00H, and count operation stops.

Bit 3 (CE1) of timer control register 1 (TMC1) is used to enable/disable count operation.  (The lower 4 bits of
the TMC1 register are used to control the operation of 8-bit timer/counter 1.)  When the CE1 bit is set to 1 by
software, TM1 is cleared to 00H by the first count clock pulse, then count-up operation starts.

When the CE1 bit is reset to 0, TM1 is cleared to 00H by the next count clock pulse, then capture operation and
coincide with signal generation stop.

If the CE1 bit is set to 1 when the CE1 bit is already set to 1, TM1 is not cleared, but continues count operation.

If the count clock signal is applied when the value of TM1 is FFH, TM1 is set to 00H.  At this time, OVF1 is set.
OVF1 can be cleared only by software.  Count operation continues.

→ count stop → count start

Count starts

CE1

←1

CE1

←1

Count clock

CE1

TM1

Rewriting

0H

0H

1H

2H

3H

4H

5H

6H

CE1

TM1

Count starts

Count stops

CE1

←1

CE1

←0

Count starts

CE1

←1

0H

1H

2H

0FH

10H

11H

0H

1H

0H

0H

Count clock