Texas Instruments TMS320DM646x Manuale Utente
www.ti.com
1.3
Functional Block Diagram
Configuration bus
DMA memory
transfer controller
Peripheral bus
EMAC control module
EMAC module
MDIO module
G/MII bus
MDIO bus
EMAC/MDIO
interrupts
ARM interrupt
controller
4
Introduction
•
No-chain mode truncates frame to first buffer for network analysis applications.
•
Emulation support.
•
Loopback mode.
shows the three main functional modules of the EMAC/MDIO peripheral:
•
EMAC control module
•
EMAC module
•
MDIO module
The EMAC control module is the main interface between the device core processor and the EMAC
module and MDIO module. The EMAC control module contains the necessary components to allow the
EMAC to make efficient use of device memory, plus it controls device interrupts. The EMAC control
module incorporates 8K-byte internal RAM to hold EMAC buffer descriptors.
module and MDIO module. The EMAC control module contains the necessary components to allow the
EMAC to make efficient use of device memory, plus it controls device interrupts. The EMAC control
module incorporates 8K-byte internal RAM to hold EMAC buffer descriptors.
The MDIO module implements the 802.3 serial management interface to interrogate and control up to 32
Ethernet PHYs connected to the device, using a shared two-wire bus. Host software uses the MDIO
module to configure the autonegotiation parameters of each PHY attached to the EMAC, retrieve the
negotiation results, and configure required parameters in the EMAC module for correct operation. The
module is designed to allow almost transparent operation of the MDIO interface, with very little
maintenance from the core processor.
Ethernet PHYs connected to the device, using a shared two-wire bus. Host software uses the MDIO
module to configure the autonegotiation parameters of each PHY attached to the EMAC, retrieve the
negotiation results, and configure required parameters in the EMAC module for correct operation. The
module is designed to allow almost transparent operation of the MDIO interface, with very little
maintenance from the core processor.
The EMAC module provides an efficient interface between the processor and the networked community.
The EMAC on this device supports 10Base-T (10 Mbits/second) and 100BaseTX (100 Mbits/second) in
either half-duplex or full-duplex mode and 1000BaseT(1000 Mbits/second) in full-duplex mode, with
hardware flow control and quality-of-service (QOS) support.
The EMAC on this device supports 10Base-T (10 Mbits/second) and 100BaseTX (100 Mbits/second) in
either half-duplex or full-duplex mode and 1000BaseT(1000 Mbits/second) in full-duplex mode, with
hardware flow control and quality-of-service (QOS) support.
Figure 1. EMAC and MDIO Block Diagram
also shows the main interface between the EMAC control module and the CPU. The following
connections are made to the device core:
•
The peripheral bus connection from the EMAC control module allows the EMAC module to read and
write both internal and external memory through the DMA memory transfer controller.
write both internal and external memory through the DMA memory transfer controller.
•
The EMAC control module, EMAC, and MDIO all have control registers. These registers are
memory-mapped into device memory space via the device configuration bus. Along with these
registers, the control module’s internal RAM is mapped into this same range.
memory-mapped into device memory space via the device configuration bus. Along with these
registers, the control module’s internal RAM is mapped into this same range.
•
The EMAC and MDIO interrupts are combined into a single interrupt within the control module. The
interrupt from the control module then goes to the ARM interrupt controller.
interrupt from the control module then goes to the ARM interrupt controller.
SPRUEQ6 – December 2007
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
13