Fujitsu FR81S Manuale Utente
CHAPTER 36: EXTERNAL BUS INTERFACE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
40
Number of write access cycles = Address output (1) + ACS(0 to 3) + CSWR(0 to 3) + Data output(1) +
WWT(0 to 15) + WRCS(0 to 3)
Minimum: 2 cycles; Maximum: 26 cycles
The following four conditions need to be met in order to correctly establish the protocol.
ADCY + 1
≤
ACS + CSRD
ADCY + 1
≤
ACS + CSWR
ASCY + 1
≤
ACS + CSRD
ASCY + 1
≤
ACS + CSWR
MB91520 Series
MN705-00010-1v0-E
1239