Fujitsu FR81S Manuale Utente
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
41
Notes:
⋅
Performing software reset (SCR:UPCL="1") will reset this bit to "0".
⋅
A read with a read-modify-write instruction will read "1".
⋅
When synchronous transmission enable bit (TSYNE) is "1", this bit will not be set to "1".
[bit7] TINTE: Timer Interrupt Enable Bit
This bit enables/disables timer interrupt to the CPU.
When this bit is "1" and timer interrupt flag (TINT) is "1", status interrupt request will be output.
TINTE
Description
0
Disables interrupt from serial timer
1
Enables interrupt from serial timer
[bit6] TSYNE: Synchronous Transmission Enable Bit
This bit enables/disables synchronous transmission.
When this bit is "1" and Serial Timer Register (STMR) matches Serial Timer Comparison Register
(STMCR), transmission will be started.
TSYNE
Description
0
Disables synchronous transmission
Serial timer is used as a timer.
1
Enables synchronous transmission
Serial timer is not used as a timer.
Notes:
⋅
This bit can be changed only when serial timer enable bit (TMRE) is "0".
⋅
When no valid data is present in the transmission data register (SSR:TDRE="1") while synchronous
transmission is enabled (SSR:TSYNE="1"), no transmission will be started even if Serial Timer Register
(STMR) matched Serial Timer Comparison Register (STMCR).
⋅
When synchronous transmission is enabled (TSYNE="1") and transmission is disabled (SCR:TXE="0"),
no transmission will be started even if Serial Timer Register (STMR) matched Serial Timer Comparison
Register (STMCR).
⋅
When Serial Timer Register (STMR) matched Serial Timer Comparison Register (STMCR) while in
transmission with synchronous transmission enabled (TSYNE="1"), it will be ignored and the
transmission will be continued.
[bit5] TRGE: External Trigger Enable Bit
This bit selects how to start the serial timer.
TRGE
Description
0
When serial timer enable bit (TMRE) is changed from "0" to "1", serial timer will be
started.
1
Any of external trigger edges set at the trigger selection bit (TRG1, 0) is detected
while serial timer enable bit (TMRE) is set to "1", serial timer will be started.
Notes:
⋅
This bit can be changed only when serial timer enable bit (TMRE) is "0".
⋅
The serial timer will not be started even if any of external trigger edges set at the trigger selection bit
(TRG1, 0) is detected while serial timer enable bit (TMRE) is set to “0”.
[bit4 to bit1] TDIV3-0: Timer Operating Clock Division Bits
These bits set division rate of the serial timer.
MB91520 Series
MN705-00010-1v0-E
1354