Fujitsu FR81S Manuale Utente
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
99
4.4.10.
Baud Rate Generator Register: BGR
Baud rate generator register (BGR) sets the division ratio of serial clock. It can also select an external clock
as the clock source of reload counter.
BGRn(n=0 to 11) : Address Base addr + 1C
H
(Access: Half-word, Word)
15
14
13
12
11
10
9
8
bit
EXT
BGR[14:8]
0
0
0
0
0
0
0
0
Initial value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attribute
7
6
5
4
3
2
1
0
bit
BGR[7:0]
0
0
0
0
0
0
0
0
Initial value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attribute
[bit15] EXT (EXTernal clock): External clock select bit
This bit selects whether to use an internal clock source or an external clock source for the internal reload
counter for baud rate generation. When setting EXT="0", the internal clock source will be used. When
setting EXT="1", the external clock source will be used.
[bit14 to bit0] BGR (Baud rate GeneratoR): Baud rate generator bits
⋅
These bits set division rate of the serial clock.
⋅
Capable of writing a reload value to be counted and reading a set value.
⋅
Reload counter will start counting when a reload value is written.
Notes:
⋅
Write to the baud rate generator (BGR) in 16-bit access mode.
⋅
When you change the setting value of the baud rate generator register (BGR), a new setting value will be
reloaded after the counter value becomes "15h00". Thus, if you wish to validate a new setting value
immediately, execute programmable clear (UPCL) after you have changed the setting value of BGR.
⋅
When the reload value is an even number, the length of "L" part of reception serial clock will be longer
than "H" part by one bus clock. When the reload value is an odd number, the lengths of "H" and "L" for
serial clock become the same.
⋅
Use a value 3 or greater for reload values. However, correct data may not be received depending on the
baud rate error and reload setup value.
⋅
When you change to the external clock setup(EXT=1) while baud rate generator is running, write "0" to
the Baud Rate Generator (BGR) and perform programmable clear (UPCL), then set to the external clock
setup(EXT=1).
MB91520 Series
MN705-00010-1v0-E
1412