Fujitsu FR81S Manuale Utente
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
5. Operation of UART
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
142
Notes:
When any of following conditions is detected while receiving at the same time of or 1 to 2 bus clocks
before the sampling point for stop bit, its edge will be invalid and the next data may not be received
correctly. To output frames continuously, some space is required between the frames.
⋅
Trailing edge of serial data (when ESCR:INV="0")
⋅
Rising edge of serial data (when ESCR:INV="1")
MB91520 Series
MN705-00010-1v0-E
1455