Fujitsu FR81S Manuale Utente
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
4
Address
Address offset value / Register name
Block
+0
+1
+2
+3
00007C
H
―
―
―
OCLS89 [R/W]
B,H,W
----0000
OCU89 Output
level control
register
000080
H
BT0TMR [R] H
00000000 00000000
BT0TMCR [R/W] H
-000--00 -000-000
Base Timer 0
000084
H
BT0TMCR2 [R/W] B
-------0
BT0STC [R/W] B
-0-0-0-0
―
―
000088
H
BT0PCSR/BT0PRLL [R/W] H
00000000 00000000
BT0PDUT/BT0PRLH/BT0DTBF [R/W] H
00000000 00000000
00008C
H
―
―
―
―
Reserved
000090
H
BT1TMR [R] H
00000000 00000000
BT1TMCR [R/W] H
-000--00 -000-000
Base Timer 1
000094
H
BT1TMCR2 [R/W] B
-------0
BT1STC [R/W] B
-0-0-0-0
―
―
000098
H
BT1PCSR/BT1PRLL [R/W] H
00000000 00000000
BT1PDUT/BT1PRLH/BT1DTBF [R/W] H
00000000 00000000
00009C
H
BTSEL01 [R/W] B
----0000
―
BTSSSR [W] B,H
-------- ------11
Base Timer 0,1
0000A0
H
to
0000FC
H
―
―
―
―
Reserved
000100
H
TMRLRA1 [R/W] H
XXXXXXXX XXXXXXXX
TMR1 [R] H
XXXXXXXX XXXXXXXX
Reload Timer 1
000104
H
TMRLRB1 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR1 [R/W] B, H,W
00000000 0-000000
000108
H
TMRLRA2 [R/W] H
XXXXXXXX XXXXXXXX
TMR2 [R] H
XXXXXXXX XXXXXXXX
Reload Timer 2
00010C
H
TMRLRB2 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR2 [R/W] B,H,W
00000000 0-000000
000110
H
TMRLRA3 [R/W] H
XXXXXXXX XXXXXXXX
TMR3 [R] H
XXXXXXXX XXXXXXXX
Reload Timer 3
000114
H
TMRLRB3 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR3 [R/W] B,H,W
00000000 0-000000
000118
H
MSCY4 [R] H,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
Input Capture 4,5
Cycle measurement
data register 45
00011C
H
MSCY5 [R] H,W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000120
H
OCCP6 [R/W] W
00000000 00000000 00000000 00000000
Output
Compare 6,7
32-bit OCU
000124
H
OCCP7 [R/W] W
00000000 00000000 00000000 00000000
000128
H
―
―
OCSH67 [R/W] B,H,W
---0--00
OCSL67 [R/W] B,H,W
0000--00
MB91520 Series
MN705-00010-1v0-E
2214