Fujitsu FR81S Manuale Utente
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
60
5.5.1. Overview
This section explains the overview of the 16-bit PWM timer operation.
The 16-bit PWM timer sets the cycle in the cycle setting register (BTxPCSR) and the duty in the duty setting
register (BTxPDUT). A desired waveform (TOUT signal) can be output by setting values in these registers.
The 16-bit PWM timer starts decreasing from the value set in the base timer x cycle setting register
(BTxPCSR). When the value of the down counter matches the value of the duty setting register (BTxPDUT),
the output signal (TOUT) level is inverted. When the down counter underflows, the output level is inverted
again. This method enables output of a desired waveform (TOUT signal) with a cycle and duty.
One of two 16-bit PWM timer operation modes can be selected using the MDSE bit of the timer control
register (BTxTMCR) as follows:
⋅
Reload mode (MDSE = 0): In this mode, when the 16-bit down counter underflows, the preset cycle is
reloaded to allow the timer to restart counting.
⋅
One-shot mode (MDSE = 1): Once the 16-bit down counter underflows, the counter will no longer
count.
MB91520 Series
MN705-00010-1v0-E
693