Fujitsu FR81S Manuale Utente
CHAPTER 23: 32-BIT INPUT CAPTURE
6. Setting
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT INPUT CAPTURE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
23
6. Setting
This section explains setting of the 32-bit input capture.
Table 6-1 Settings Required for Using Input Capture
Configuration
Configured register
Setting
method
Free-run timer setting
See "CHAPTER: 32-BIT FREE-RUN TIMER".
―
Free-run timer activation
Setting for switching inputs
between input pins ICU4 to
ICU9 and input capture
If the linkage function for multi-function serial interface is used:
LIN SYNCH FIELD switching register (LSYNS1)
External input:
Settings of the LIN SYNCH FIELD switching register (LSYNS1),
Setting of ICU4 to ICU9 pins
(See "CHAPTER: I/O PORTS").
See 7.2.
Effective edge polarity
selection for external
input
Input capture control registers
(ICS45), (ICS67), (ICS89)
See 7.1.
Operation mode setting
Operation mode setting bit (MSCn) is set.
See 7.7.
Table 6-2 Settings Required for Performing Input Capture Interrupt
Configuration
Configured register
Setting
method
Input capture interrupt vector and
input capture interrupt level settings
See "CHAPTER: INTERRUPT CONTROL
(INTERRUPT CONTROLLER)".
See 7.3.
Input capture interrupt setting
Interrupt request clear
Interrupt request enable
Input capture control registers
(ICS45), (ICS67), (ICS89)
See 7.5.
MB91520 Series
MN705-00010-1v0-E
898