Texas Instruments TMS320C6000 Manuale Utente
Glossary
A-2
block:
The three least significant bits of the program address. These corre-
spond to the address within a fetch packet of the first instruction being
addressed.
addressed.
BOARD:
The BOARD-specific API Module.
board support library (BSL):
The BSL is a set of application programming
interfaces (APIs) consisting of target side DSP code used to configure
and control board level peripherals.
and control board level peripherals.
boot:
The process of loading a program into program memory.
boot mode:
The method of loading a program into program memory. The
C6x DSP supports booting from external ROM or the host port interface
(HPI).
(HPI).
BSL:
See board support library.
byte:
A sequence of eight adjacent bits operated upon as a unit.
C
cache:
A fast storage buffer in the central processing unit of a computer.
cache module:
CACHE is an API module containing a set of functions for
managing data and program cache.
cache controller:
System component that coordinates program accesses
between CPU program fetch mechanism, cache, and external memory.
CCS:
Code Composer Studio.
central processing unit (CPU):
The portion of the processor involved in
arithmetic, shifting, and Boolean logic operations, as well as the genera-
tion of data- and program-memory addresses. The CPU includes the
central arithmetic logic unit (CALU), the multiplier, and the auxiliary regis-
ter arithmetic unit (ARAU).
tion of data- and program-memory addresses. The CPU includes the
central arithmetic logic unit (CALU), the multiplier, and the auxiliary regis-
ter arithmetic unit (ARAU).
CHIP:
See CHIP module.
CHIP module:
The CHIP module is an API module where chip-specific and
device-related code resides. CHIP has some API functions for obtaining
device endianess, memory map mode if applicable, CPU and REV IDs,
and clock speed.
device endianess, memory map mode if applicable, CPU and REV IDs,
and clock speed.
chip support library (CSL):
The CSL is a set of application programming
interfaces (APIs) consisting of target side DSP code used to configure
and control all on-chip peripherals.
and control all on-chip peripherals.