Texas Instruments VLYNQ Port Manuale Utente
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3.9
Receive Address Map Size 1 Register (RAMS1)
3.10 Receive Address Map Offset 1 Register (RAMO1)
VLYNQ Port Registers
The receive address map size 1 register (RAMS1) is used to identify the intended destination of inbound
serial packets. The RAMS1 is shown in
serial packets. The RAMS1 is shown in
and described in
Figure 17. Receive Address Map Size 1 Register (RAMS1)
31
2
1
0
RXADRSIZE1
Reserved
R/W-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 15. Receive Address Map Size 1 Register (RAMS1) Field Descriptions
Bit
Field
Value
Description
31-2
RXADRSIZE1
0-3FFF FFFFh
The RXADRSIZE1 field is used to determine if receive packets are destined for the first of
four mapped address regions. RXADRSIZE1 is compared with the address contained in the
receive packet. If the received packet address is less than the value in RXADRSIZE1, the
packet address is added to the receive address map offset 1 register (RAMO1) to obtain the
translated address.
four mapped address regions. RXADRSIZE1 is compared with the address contained in the
receive packet. If the received packet address is less than the value in RXADRSIZE1, the
packet address is added to the receive address map offset 1 register (RAMO1) to obtain the
translated address.
1-0
Reserved
0
Reserved. Always read as 0. Writes have no effect.
The receive address map offset 1 register (RAMO1) is used with the receive address map size 1 register
(RAMS1) to translate receive packet addresses to local device configuration bus addresses. The RAMO1
is shown in
(RAMS1) to translate receive packet addresses to local device configuration bus addresses. The RAMO1
is shown in
and described in
Figure 18. Receive Address Map Offset 1 Register (RAMO1)
31
2
1
0
RXADROFFSET1
Reserved
R/W-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 16. Receive Address Map Offset 1 Register (RAMO1) Field Descriptions
Bit
Field
Value
Description
31-2
RXADROFFSET1
0-3FFF FFFFh
The RXADROFFSET1 field is used with the receive address map size 1 register (RAMS1)
to determine the translated address for serial data. If the received packet address is less
than the value in RAMS1, the packet address is added to the contents of this register to
obtain the translated address.
to determine the translated address for serial data. If the received packet address is less
than the value in RAMS1, the packet address is added to the contents of this register to
obtain the translated address.
1-0
Reserved
0
Reserved. Always read as 0. Writes have no effect.
34
VLYNQ Port
SPRUE36A – September 2007