NEC PD78058F(A) Manuale Utente

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CHAPTER 8   16-BIT TIMER/EVENT COUNTER
TOC0
1
1
0/1
0/1
1
0
0
0
TOE0
TOC01
LVR0
LVS0
Inversion of output on match of TM0 and CR00
TOC04
OSPE
OSPT
TO0 Output Enabled
Specified TO0 output F/F initial value
Inversion of output on match of TM0 and CR01
One-shot pulse output disabled
CRC0
0
x
0
0
0
0
0
0
CRC00
CRC01
CRC02
CR00 set as compare register
CR01 set as compare register
TMC0
0
0
1
1
0
0
0
0
OVF0
TMC01
TMC02
TMC03
Clear & start on match of TM0 and CR00
8.5.3  PPG output operations
Setting the 16-bit timer mode control register (TMC0) and capture/compare control register 0 (CRC0) as shown
in Figure 8-16 allows operation as PPG (Programmable Pulse Generator) output.
In the PPG output operation, square waves are output from the TO0/P30 pin with the pulse width and the cycle
that correspond to the count values set beforehand in 16-bit capture/compare register 01 (CR01) and in 16-bit capture/
compare register 00 (CR00), respectively.
Figure 8-16.  Control Register Settings for PPG Output Operation
(a)  16-bit timer mode control register (TMC0)
(b)  Capture/compare control register 0 (CRC0)
(c)  16-bit timer output control register (TOC0)
Remark
×
 :  Don't care
Caution Values in the following range should be set in CR00 and CR01:
0000H 
 CR01 
<
 CR00 
 FFFFH