Motorola MC68VZ328 Manuale Utente

8-18

The LCD clocking control (LCKCON) register is used to enable the LCD controller and control the LCD 
memory cycle. The bit assignments for the register are shown in the following register display. The 
settings for the bits in the register are listed in Table 8-14.

LCD Clocking Control Register

The LCD refresh rate adjustment (LRRA) register is used to fine-tune the display refresh rate by 
introducing an idle interval between alternate LCD DMA and display cycles

.

 The bit assignments for the 

register are shown in the following register display. The settings for the bits in the register are listed in 
Table 8-15.

LCD Refresh Rate Adjustment Register

BIT  7

6

5

4

3

2

1

BIT  0

LCDON

Unused

TYPE

rw

rw

rw

rw

rw

rw

rw

rw

RESET

0

0

0

0

0

0

0

0

0x00

LCDON
Bit 7

LCD Control—This bit enables the LCD controller. Default is 
off.

0 = Disable the LCD controller
1 = Enable the LCD controller

Unused
Bits 6–0

These bits are not used by the chip and may be used for tem-
porary storage. At reset these bits are cleared.

See description

BIT  15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

BIT  0

RRA[9:0]

TYPE

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

RESET

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0x00FF

Reserved
Bits 15–10

Reserved

These bits 
are reserved 
and should 
be set to 0.