Motorola MC68VZ328 Manuale Utente

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About This Book
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About This Book
This user’s manual describes the features and operation of the MC68VZ328 (DragonBall™ VZ) 
microprocessor, the third generation of the DragonBall
 
family of products. It provides the details of how to 
initialize, configure, and program the MC68VZ328. The manual presumes basic knowledge of 68000 
architecture.
Audience
The MC68VZ328 user’s manual is intended to provide a design engineer with the necessary data to 
successfully integrate the MC68VZ328 into a wide variety of applications. It is assumed that the reader has 
a good working knowledge of the 68000 CPU. For programming information about the 68000, see the 
documents listed in the Suggested Reading section of this preface.
Organization
The MC68VZ328 user’s manual is organized into 20 chapters that cover the operation and programming of 
the DragonBall VZ device. Summaries of the chapters follow.
Introduction: This chapter contains a device overview, system block diagrams, 
and an operational overview of 68000 CPU operation. 
Chapter 2
Signal Descriptions: This chapter contains listings of the MC68VZ328 input and 
output signals, organized into functional groups.
Chapter 3
Memory Map: This chapter summarizes the memory organization, 
programming information, and registers’ addresses and reset values.
Chapter 4
Clock Generation Module and Power Control Module: This chapter provides 
detailed information about the operation and programming of the clock 
generation module as well as the recommended circuit schematics for external 
clock circuits. It also describes and provides programming information about the 
operation of the power control module and the system power states.
System Control: This chapter describes the operation of and programming 
models for the system control, peripheral control, ID, and I/O drive control 
registers.
Chapter 6
Chip-Select Logic: This chapter describes the operation and programming of the 
chip-select logic. It includes information related to the operation of the DRAM 
controller and other memory-related applications.
Chapter 7
DRAM Controller: The operation and programming of the DRAM controller is 
described in this chapter. This module provides a glueless interface to 8-bit or 
16-bit DRAM supporting EDO RAM, Fast Page Mode, and synchronous DRAM.
Chapter 8
LCD Controller: This chapter describes the operation and programming of the 
LCD controller, which provides display data for external LCD drivers or for an 
LCD panel.