Motorola MC68VZ328 Manuale Utente
16-12
MC68VZ328 User’s Manual
Plug-in Emulator Design Example
16.3.3
Emulation Memory Mapping FPGA and Emulation
Memory
Since the memory on the target board may not be fully built or debugged, it is necessary to have some
memory that replaces the target memory for debugging at the initial stage. In some cases, ROM codes are
downloaded to a shadowed RAM area for debugging purposes. The map FPGA will work with those
chip-select signals to map them to the emulation memory, instead of going directly to the target board.
memory that replaces the target memory for debugging at the initial stage. In some cases, ROM codes are
downloaded to a shadowed RAM area for debugging purposes. The map FPGA will work with those
chip-select signals to map them to the emulation memory, instead of going directly to the target board.
16.3.4
Optional Extra Hardware Breakpoint
The FPGA address comparator can be added to enhance the number of hardware breakpoints in the
emulator. As discussed in Section 16.1.2, “Detecting Breakpoints,” in multiple breakpoint mode the
external FPGA address comparator compares the lower address, the internal comparator compares the
upper hidden address line, and then a EMUIRQ signal is generated to tell the in-circuit emulation module
to generate a breakpoint.
emulator. As discussed in Section 16.1.2, “Detecting Breakpoints,” in multiple breakpoint mode the
external FPGA address comparator compares the lower address, the internal comparator compares the
upper hidden address line, and then a EMUIRQ signal is generated to tell the in-circuit emulation module
to generate a breakpoint.
16.3.5
Optional Trace Module
A trace module may also be added to enhance the function of the emulator. Trace captures the bus signals
of all of the cycles, so that when a stop is encountered, the interface software can report all the cycle traces
back for that breakpoint. This action is based on the timebase of the CLKO signal, P/D signal, and DTACK
signal to decide whether the trace capture is a program or data fetch.
of all of the cycles, so that when a stop is encountered, the interface software can report all the cycle traces
back for that breakpoint. This action is based on the timebase of the CLKO signal, P/D signal, and DTACK
signal to decide whether the trace capture is a program or data fetch.
16.4
Plug-in Emulator Design Example
Figure 16-3 on page 16-13 displays an example of a plug-in emulator design. The design is simple and
low-cost, and it creates a very basic debugging environment.
low-cost, and it creates a very basic debugging environment.