IBM 150 Manuale Utente
Detailed Product Descriptions
79
3.2.3 Reliability, Availability, and Serviceability (RAS)
The RS/6000 43P 7043 Model 260 integrates key reliability, availability, and
serviceability attributes that are described in the following sections.
serviceability attributes that are described in the following sections.
3.2.3.1 Reliability, Fault Tolerance, and Data Integrity
The reliability of the Model 260 system starts with reliable components,
devices, and subsystems. During the design and development process,
subsystems go through rigorous verification and integration testing
processes. During system manufacturing, systems go through a thorough
testing process to ensure the highest product quality level.
The reliability of the Model 260 system starts with reliable components,
devices, and subsystems. During the design and development process,
subsystems go through rigorous verification and integration testing
processes. During system manufacturing, systems go through a thorough
testing process to ensure the highest product quality level.
The Model 260 system L2 Cache and system memory offers Error Checking
and Correcting (ECC) fault-tolerant features. ECC corrects environmentally
induced single-bit intermittent memory failures, as well as single-bit hard
failures. With ECC, the likelihood of memory failures will be substantially
reduced. ECC also provides double-bit memory error detection that protects
data integrity in the event of a double-bit memory failure. System memory
also provides 4-bit packet error detection that helps protect data integrity in
the event of a DRAM chip failure. The system bus, I/O bus, and PCI buses
are designed with parity error detection.
and Correcting (ECC) fault-tolerant features. ECC corrects environmentally
induced single-bit intermittent memory failures, as well as single-bit hard
failures. With ECC, the likelihood of memory failures will be substantially
reduced. ECC also provides double-bit memory error detection that protects
data integrity in the event of a double-bit memory failure. System memory
also provides 4-bit packet error detection that helps protect data integrity in
the event of a DRAM chip failure. The system bus, I/O bus, and PCI buses
are designed with parity error detection.
Disk mirroring and disk controller duplexing capability are also provided by
the AIX operating system.
the AIX operating system.
The Journaled File System of the AIX operating system maintains file system
consistency and reduces the likelihood of data loss when the system is
abnormally halted due to a power failure.
consistency and reduces the likelihood of data loss when the system is
abnormally halted due to a power failure.
An available RAID hardware feature for the system provides data integrity
and fault tolerance in the event of disk drive failure.
and fault tolerance in the event of disk drive failure.
3.2.3.2 Service Processor
A service processor is included in the system, providing an immediate means
to diagnose, check status, and sense operational conditions of a remote
system, even when the main processor is inoperable. The service processor
enables firmware and operating system surveillance, several remote power
controls, environmental monitoring, reset and boot features, along with
remote maintenance and diagnostic activities, including console mirroring.
The service processor can place calls to report surveillance failures, critical
environmental faults and critical processing faults.
A service processor is included in the system, providing an immediate means
to diagnose, check status, and sense operational conditions of a remote
system, even when the main processor is inoperable. The service processor
enables firmware and operating system surveillance, several remote power
controls, environmental monitoring, reset and boot features, along with
remote maintenance and diagnostic activities, including console mirroring.
The service processor can place calls to report surveillance failures, critical
environmental faults and critical processing faults.
For more information about the Service Processor please refer to Chapter 7,
“Service Processor” on page 185.
“Service Processor” on page 185.