Intel 82558 Manuale Utente

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preferred method of accessing the CSR. Some bridges may not properly transfer data in memory 
mapped mode and it may be necessary to have an I/O backup method if the memory method does 

not work.

Note: All fields in the CSR are byte, word, or Dword addressable. Accesses to the CSR, especially the 

SCB command and status word, should be limited to byte-wide operations to avoid and side 
effects. For example, issuing a new command through the CU, only the lower byte of the CSR 

command word should be accessed (byte 2 of the CSR). This will prevent any accidental 

modification of the interrupt mask or software interrupt bits that occupy the upper byte of the 
command word.

The SCB plays a major role in communications between the CPU and the LAN controller. 
Commands issued by the software and status reported by the device are placed in the SCB. The 

SCB is part of the CSR and represents the first two Dwords of that structure.

Control commands are issued to the device by writing them into the SCB. This causes the device to 

examine the command, clear the lower byte of the SCB command word (indicating command 
acceptance), and perform the required action. Control commands perform the following types of 

tasks:

•

Operate the Command Unit (CU). The SCB controls the CU by specifying the address of the 
Command Block List (CBL) and by starting or resuming execution of CBL commands.

•

Operate the Receive Unit (RU). The SCB controls RU frame reception by specifying the 

address of the Receive Frame Area (RFA) and by starting, resuming, or aborting frame 
reception.

•

Load the dump counters address.

•

Command the device to dump or dump and reset its internal statistical counters.
In a similar manner, the CPU can send Interrupt Acknowledgments to the device by writing 

them into the Interrupt Acknowledge byte (upper byte of the SCB Status word).
The device also indicates status to the CPU through bits in the SCB Status word such as CU 
status and RU status.

•

Indicate the cause of the current interrupt(s). Interrupts are caused by one or more of the 
following events:

— The CU will interrupt the CPU when it completes an action command that has its interrupt 

bit set (CX Interrupt).

— The CU will interrupt the CPU either when it leaves the active state (CNA Interrupt) or 

when it enters the idle state (CI Interrupt), depending on how the device is configured.

— The CU will interrupt the CPU when it completes a transmit command with a bad status 

(TNO Interrupt) if it is configured.

— The RU will interrupt the CPU when it receives either a complete frame or a predefined 

part of it (FR Interrupt or ER Interrupt for the 82558 and 82559 devices).

— The RU is not ready (RNR Interrupt).

— A previously initiated read or write cycle to the MDI has been completed (MDI Interrupt).

— Software has requested an interrupt (SWI Interrupt).