Intel 82558 Manuale Utente

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Similarly, the value at offset 14 of the configuration block is compared to the byte at offset 40 
in ARP frames without a VLAN header and to byte 44 in ARP frames with a VLAN header.
The 16-bit value of the IP address in the configuration block is in non-canonical format, while 

the IP address of an ARP frame is stored in canonical format. Using the same IP address in the 
example above (012h 034h 056h 078h), the ARP filter performs the following comparison:

Although this field is not present in the 82559, its functionality is present in the extended 
wake-up packet command.
Default - 00h, F2h (for backward compatibility).

— Bit 7 - CRS or CDT. When this bit is set, the device will interpret an active CDT during 

transmission as an active carrier.
0 = CRS only.
1 = CRS or CDT.
Default - 1.
Recommended - 1 for 82557/82503 based designs, 0 for 82557/MII based designs, 0 for 
82558 or 82559 based designs.

— Bit 5 - CRC16. 

This bit selects the 16-bit or 32-bit CRC engine. When it is set to 1, the 82559 operates 
with a 16-bit CRC generator. Clearing this bit selects the 32-bit CRC engine. (Ethernet 

operates with a 32-bit CRC.)
0 = 32-bit CRC.
1 = 16-bit CRC.
Default - 0.
Recommended - 0 (must be 0).

— Bit 4 - Ignore U/L. This bit is reserved on the 82557 and should be set to 0. When this bit 

is set on the 82558 or 82559, the device ignores the U/L bit when checking for IA match 
on received frames.
0 = Consider U/L bit.
1 = Ignore U/L bit.
Default - 0 (Consider U/L bit).
Recommended - 0.

— Bit 2 - Wait After Win. This bit is reserved on the 82557 and should be set to 0. For the 

82558 or 82559, it activates the modified backoff algorithm, Wait After Win (

0 = Wait After Win disabled.
1 = Wait After Win enabled.

Block Offset

Offset 13
IP Address Low

Offset 14
IP Address High

Example Value

078h

056h

Frame Offset

40

41

Incoming Frame