3com S330 Manuale Utente
B
P
ATH
B
UILDER
S330/S310 M
ODULE
AND
A
PPLICATION
O
VERVIEW
This chapter describes the operation and data flow for each of the SuperStack
®
II
PathBuilder
®
S330 and S310 WAN access switch (PathBuilder S330/S310) modules
and supported applications. It contains the following sections:
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Management CPU
The management CPU provides an intelligent user interface in addition to the
other built-in interfaces available on the PathBuilder S330/S310. It also monitors
and controls the activity on the shelf. These functions include:
other built-in interfaces available on the PathBuilder S330/S310. It also monitors
and controls the activity on the shelf. These functions include:
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Providing a user interface through a VT100 terminal or Ethernet (Telnet).
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Programming configurations.
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Generating and filtering alarms and transmitting them to the NMS.
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Gathering performance-monitoring data.
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Checking and assigning an appropriate clock source.
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Communicating with other nodes via the management VC channel.
CTX Switch
The CTX switch interfaces to all ATM busses in the system. It handles address
translation and switching among seven ATM ports. Up to four ports come from
the T1/E1 UNIs. The other three ports come from the onboard OC3/STM-1, the
SAR, and expansion slots 7, 8, and/or 9 (the optional CBR module, Voice
Compression module, and DS3/E3 UNI module).
translation and switching among seven ATM ports. Up to four ports come from
the T1/E1 UNIs. The other three ports come from the onboard OC3/STM-1, the
SAR, and expansion slots 7, 8, and/or 9 (the optional CBR module, Voice
Compression module, and DS3/E3 UNI module).
Address translation is done via two lookups. The first lookup is a VP lookup (all 8
bits included). If a VP circuit is set up, then a VP translation is done; otherwise, a
second lookup consisting of 2 VPI bits and 8 VCI bits, is done. For VC connections,
any four VPs in the range 0-255 are allowed. Once the VC is found, the CTX
performs the address translation.
bits included). If a VP circuit is set up, then a VP translation is done; otherwise, a
second lookup consisting of 2 VPI bits and 8 VCI bits, is done. For VC connections,
any four VPs in the range 0-255 are allowed. Once the VC is found, the CTX
performs the address translation.
If a cell carries data, then the switch tries to place it in the proper output FIFO
(First-In, First Out) order. If the queue is congested and early packet discard is
(First-In, First Out) order. If the queue is congested and early packet discard is