Motorola MVME2400 Manuale Utente
Block Diagram
http://www.mcg.mot.com/literature
3-27
3
Real-Time Clock/NVRAM/Timer Function
The MVME240x employs an SGS-Thomson surface-mount M48T559
RAM and clock chip to provide 8KB of non-volatile static RAM, a real-
time clock, and a watchdog timer function. This chip supplies a clock,
oscillator, crystal, power failure detection, memory write protection, 8KB
of NVRAM, and a battery in a package consisting of two parts:
RAM and clock chip to provide 8KB of non-volatile static RAM, a real-
time clock, and a watchdog timer function. This chip supplies a clock,
oscillator, crystal, power failure detection, memory write protection, 8KB
of NVRAM, and a battery in a package consisting of two parts:
❏
A 28-pin 330mil SO device containing the real-time clock, the
oscillator, power failure detection circuitry, timer logic, 8KB of
static RAM, and gold-plated sockets for a battery
oscillator, power failure detection circuitry, timer logic, 8KB of
static RAM, and gold-plated sockets for a battery
❏
A SNAPHAT battery housing a crystal along with the battery
The SNAPHAT battery package is mounted on top of the M48T559
device. The battery housing is keyed to prevent reverse insertion.
device. The battery housing is keyed to prevent reverse insertion.
The clock furnishes seconds, minutes, hours, day, date, month, and year in
BCD 24-hour format. Corrections for 28-, 29- (leap year), and 30-day
months are made automatically. The clock generates no interrupts.
Although the M48T559 is an 8-bit device, 8-, 16-, and 32-bit accesses from
the ISA bus to the M48T559 are supported. Refer to the MVME2400-
Series VME Processor Module Programmer’s Reference Guide and to the
M48T559 data sheet for detailed programming and battery life
information.
BCD 24-hour format. Corrections for 28-, 29- (leap year), and 30-day
months are made automatically. The clock generates no interrupts.
Although the M48T559 is an 8-bit device, 8-, 16-, and 32-bit accesses from
the ISA bus to the M48T559 are supported. Refer to the MVME2400-
Series VME Processor Module Programmer’s Reference Guide and to the
M48T559 data sheet for detailed programming and battery life
information.
PCI Host Bridge (PHB)
The PHB portion of the Hawk ASIC provides the bridge function between
the MPC60x bus and the PCI Local Bus. It provides 32 bit addressing and
64 bit data. The 64 bit addressing (dual address cycle) is not supported. The
Hawk supports various PowerPC processor external bus frequencies up to
100MHz and PCI frequencies up to 33MHz.
the MPC60x bus and the PCI Local Bus. It provides 32 bit addressing and
64 bit data. The 64 bit addressing (dual address cycle) is not supported. The
Hawk supports various PowerPC processor external bus frequencies up to
100MHz and PCI frequencies up to 33MHz.
There are four programmable map decoders for each direction to provide
flexible address mappings between the MPC and the PCI Local Bus. Refer
to the MVME2400-Series VME Processor Module Programmer’s
Reference Guide for additional information and programming details.
flexible address mappings between the MPC and the PCI Local Bus. Refer
to the MVME2400-Series VME Processor Module Programmer’s
Reference Guide for additional information and programming details.