Renesas SH7264 Manuale Utente
Section 27 Video Display Controller 3
R01UH0134EJ0400 Rev. 4.00
Page 1605 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Reference Hsync
V
sync for graphic image
GROPEDPH + 10
GROPEW
Graphics image area
α control
area
GROPEH
GROPEDP
V
+ 1
Figure 27.22
Control Area Settings
27.7.25
Control Registers (GROPEDPA1 and GROPEDPA2)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
RR/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
R/W
DEFA[7:0]
ARATE[7:0]
ACOEF[7:0]
WE
-
-
AST
-
AMOD[1:0]
AEN
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
31 to 24
DEFA[7:0]
H'FF
R/W
These bits specify the initial
value.
23 to 16
ACOEF[7:0] H'00
R/W
These bits specify a coefficient for
value
calculation. This value is added to or subtracted
from the DEFA value.
from the DEFA value.
15 to 8
ARATE[7:0] H'00
R/W
These bits specify the frame rate of
control. (The
reference Vsync is used as the unit of counting.)
0: addition and subtraction every frame
1: addition and subtraction every two frames
:
FF: addition and subtraction every 256 frames