Intel Itanium 9140M NE80567KF028009 Manuale Utente

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NE80567KF028009

Dual-Core Intel

Itanium

Processor 9000 and 9100 Series Datasheet

Electrical Specifications

2.6

Voltage Regulator Connector Signals

The VR module consists of three DC-DC converters, V

core

, V

cache

, and V

fixed

Table 2-18

lists all of the signals which are part of the processor package VR output

connector.

Warning:

If the VR cannot supply the voltages requested by the components in the processor

package, then it must disable itself.

Figure 2-4

shows the top view of the processor package power tab. See

Table 2-19

for

power tab connector signals.

1.4

–0.2

0.9925

1.3358

1.875

1.35

–0.15

1.875

1.3

–0.10

1.875

Notes:

1. Activity Factor = 1 means signal toggles every 3.75 ns.

Table 2-17. Wired-OR Signal Group (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#)

Overshoot/Undershoot Tolerance for 533-MHz System Bus

Absolute

Maximum (V)

Pulse Duration (ns)

Over-

shoot

Under-

shoot

AF = 1

Notes:

1. Activity Factor = 1 means signal toggles every 7.5 ns.

AF = 0.75

AF = 0.5

AF = 0.25

AF = 0.1

AF = 0.05 AF = 0.01

1.65

–0.45

0.01248

0.0144

0.0230

0.0461

0.1155

0.2301

1.1530

1.6

–0.4

0.0380

0.0507

0.0763

0.1522

0.3814

0.7627

3.75

1.55

-0.35

0.1250

0.1668

0.2507

0.5004

1.2537

2.5059

3.75

1.5

–0.3

0.4054

0.5424

0.8163

1.6302

3.75

1.45

–0.25

1.3013

1.7396

2.6246

3.75

1.4

-0.2

3.75

1.35

–0.15

3.75

Table 2-16. Source Synchronous AGTL+ Signal Group Time-Dependent Overshoot/

Undershoot Tolerance for 533-MHz System Bus (Sheet 2 of 2)

Absolute

Maximum (V)

Pulse Duration (ns)

Table 2-18. VR Connector Signals

Group Name

Signals

Voltage Regulator

Connector

PPODGD#, CPUPRES#, GND, Vid_valid, Vid_Core[5:0],

Vid_cache [5:0], Vcache_sense, Gnd_sense, Vcore_sense,

Vfixed_sense, OUTEN.