Intel Itanium 9140M NE80567KF028009 Manuale Utente

9

„

Dual Core

— Two complete 64-bit processing cores on one 

processor. 

„

EPIC (Explicitly Parallel Instruction Computing) 

Technology for current and future requirements of 

high-end enterprise and technical workloads

— Provide a variety of advanced 

implementations of parallelism, predication, 

and speculation, resulting in superior 

Instruction-Level Parallelism (ILP). 

„

Hyper-Threading Technology

— Two times the number of OS threads per core 

provided by earlier single-thread 

implementations.

„

Wide, parallel hardware based on Intel

®

 Itanium

®

 

architecture for high performance:

— Integrated on-die L3 cache of up to 24MB; 

cache hints for L1, L2, and L3 caches for 

reduced memory latency.

— 128 general and 128 floating-point registers 

supporting register rotation.

— Register stack engine for effective 

management of processor resources.

— Support for predication and speculation.

„

Extensive RAS features for business-critical 

applications:

— Full SMBus compatibility.

— Enhanced machine check architecture with 

extensive ECC and parity protection.

— Enhanced thermal management.

— Built-in processor information ROM (PIROM).

— Built-in  programmable  EEPROM.

— Socket Level Lockstep

— Core Level Lockstep

„

Intel

®

 Virtualization Technology for virtualization for 

data-intensive applications. 

— Reduces virtualization complexity.

— Improves virtualization performance.

— Increases operating system compatibility. 

„

Intel

®

 Cache Safe Technology ensures mainframe-

caliber availability. 

— Minimize L3 cache errors.

„

Outstanding Energy Efficiency. 

— 20 percent less power than previous Intel 

Itanium processor.

— 2.5 times higher performance per watt.

„

High-bandwidth system bus for multiprocessor 

scalability:

— Up to 8.53GB/s bandwidth.

— 128-bit wide data bus.

— 50-bits of physical memory addressing and 

64-bits of virtual addressing.

— Up to four physical processors on the same 

system bus at 400-MHz or 533-MHz data bus 

frequency.

— Expandable to systems with multiple system 

buses.

„

Features to support flexible platform environments:

— IA-32 Execution Layer supports IA-32 

application binaries.

— Bi-endian support.

— Processor abstraction layer eliminates 

processor dependencies.

„

667-MHz, 1.66-GHz, 3-load bus

a

— This feature enables increased bandwidth for 

Enterprise and HPC.

„

Demand Based Switching (DBS)

a

— Provides additional power management 

capability.

a. This feature is applicable to only the 9100 series processors