Intel D425 AU80610006252AA Manuale Utente
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AU80610006252AA
Processor Configuration Registers
Datasheet
19
Figure 1-4. PCI Memory Address Range
1.2.3.1
APIC Configuration Space (FEC0_0000h-FECF_FFFFh)
This range is reserved for APIC configuration space. The I/O APIC(s) usually reside in
the PCH portion of the chipset, but may also exist as stand-alone components like
the PCH portion of the chipset, but may also exist as stand-alone components like
PXH.
The IOAPIC spaces are used to communicate with IOAPIC interrupt controllers that
may be populated in the system. Since it is difficult to relocate an interrupt controller
using plug-and-play software, fixed address decode regions have been allocated for
may be populated in the system. Since it is difficult to relocate an interrupt controller
using plug-and-play software, fixed address decode regions have been allocated for