Intel Xeon L3406 CM80616005010AA Manuale Utente
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CM80616005010AA
Datasheet, Volume 2
265
Processor Uncore Configuration Registers
4.11.2
MC_DOD_CH1_0
MC_DOD_CH1_1
Channel 1 DIMM Organization Descriptor Register.
Device:
5
Function:
1
Offset:
48h, 4Ch, 50h, 54h
Access as a DWord
Bit
Attr
Default
Description
31:13
RO
0
Reserved
12:10
RW
0
RANKOFFSET
Rank Offset for calculating RANK. This corresponds to the first logical rank on
Rank Offset for calculating RANK. This corresponds to the first logical rank on
the DIMM. The rank offset is always programmed to 0 for the DIMM 0 DOD
registers. (DIMM 0 rank offset is always 0.) DIMM 1 DOD rank offset is 4 for
two DIMMs per channel or 2 if there are three DIMMs per channel . DIMM2
DOD rank offset is always 4 as it is only used in three DIMMs per channel
case.
9
RW
0
DIMMPRESENT. DIMM slot is populated.
8:7
RW
0
NUMBANK
This field defines the number of (real, not shadow) banks on these DIMMs.
00 = Four-banked
01 = Eight-banked
10 = Sixteen-banked
This field defines the number of (real, not shadow) banks on these DIMMs.
00 = Four-banked
01 = Eight-banked
10 = Sixteen-banked
6:5
RW
0
NUMRANK. Number of Ranks
This field defines the number of ranks on these DIMMs.
00 = Single Ranked
01 = Double Ranked
10 = Quad Ranked
This field defines the number of ranks on these DIMMs.
00 = Single Ranked
01 = Double Ranked
10 = Quad Ranked
4:2
RW
0
NUMROW. Number of Rows
This field defines the number of rows within these DIMMs.
000 = 2^12 Rows
001 = 2^13 Rows
010 = 2^14 Rows
011 = 2^15 Rows
100 = 2^16 Rows
This field defines the number of rows within these DIMMs.
000 = 2^12 Rows
001 = 2^13 Rows
010 = 2^14 Rows
011 = 2^15 Rows
100 = 2^16 Rows
1:0
RW
0
NUMCOL. Number of Columns
This field defines the number of columns within on these DIMMs.
00 = 2^10 columns
01 = 2^11 columns
10 = 2^12 columns
11 = RSVD
This field defines the number of columns within on these DIMMs.
00 = 2^10 columns
01 = 2^11 columns
10 = 2^12 columns
11 = RSVD