Intel W5590 AT80602000753AA Manuale Utente
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AT80602000753AA
Intel® Xeon® Processors 5500 Series Electrical Specifications
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Intel
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Xeon
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Processor 5500 Series Datasheet, Volume 1
2. Processors must operate at the same core frequency. Note, processors within the
same power-optimization segment supporting different maximum core frequencies
(e.g. a 2.93 GHz / 95 W and 2.66 GHz / 95 W) can be operated within a system.
However, both must operate at the highest frequency rating commonly supported.
Mixing components operating at different internal clock frequencies is not
supported and will not be validated by Intel.
(e.g. a 2.93 GHz / 95 W and 2.66 GHz / 95 W) can be operated within a system.
However, both must operate at the highest frequency rating commonly supported.
Mixing components operating at different internal clock frequencies is not
supported and will not be validated by Intel.
3. Processors must share symmetry across physical packages with respect to the
number of logical processors per package, number of cores per package (but not
necessarily the same subset of cores within the packages), number of Intel
QuickPath interfaces, and cache topology.
necessarily the same subset of cores within the packages), number of Intel
QuickPath interfaces, and cache topology.
4. Mixing dissimilar steppings is only supported with processors that have identical
Extended Family, Extended Model, Processor Type, Family Code and Model Number
as indicated by the function 1 of the CPUID instruction. Mixing processors of
different steppings but the same model (as per CPUID instruction) is supported.
Details regarding the CPUID instruction are provided in the AP-485,
Intel
as indicated by the function 1 of the CPUID instruction. Mixing processors of
different steppings but the same model (as per CPUID instruction) is supported.
Details regarding the CPUID instruction are provided in the AP-485,
Intel
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Processor Identification and the CPUID Instruction application note and the
Intel
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64 and IA-32 Architectures Software Developer’s Manual, Volume 2A.
5. After AND’ing the feature flag and extended feature flags from the installed
processors, any processor whose set of feature flags exactly matches the AND’ed
feature flags can be selected by the BIOS as the BSP. If no processor exactly
matches the AND’ed feature flag values, then the processor with the numerically
lower CPUID should be selected as the BSP.
feature flags can be selected by the BIOS as the BSP. If no processor exactly
matches the AND’ed feature flag values, then the processor with the numerically
lower CPUID should be selected as the BSP.
6. Intel requires that the proper microcode update be loaded on each processor
operating within the system. Any processor that does not have the proper
microcode update loaded is considered by Intel to be operating out of specification.
microcode update loaded is considered by Intel to be operating out of specification.
7. Customers are fully responsible for the validation of their system configuration.
2.4
Flexible Motherboard Guidelines (FMB)
The Flexible Motherboard (FMB) guidelines are estimates of the maximum values the
Intel Xeon Processor 5500 Series will have over certain time periods. The values are
only estimates and actual specifications for future processors may differ. Processors
may or may not have specifications equal to the FMB value in the foreseeable future.
System designers should meet the FMB values to ensure their systems will be
compatible with future Intel Xeon Processor 5500 Series.
Intel Xeon Processor 5500 Series will have over certain time periods. The values are
only estimates and actual specifications for future processors may differ. Processors
may or may not have specifications equal to the FMB value in the foreseeable future.
System designers should meet the FMB values to ensure their systems will be
compatible with future Intel Xeon Processor 5500 Series.
2.5
Absolute Maximum and Minimum Ratings
specifies absolute maximum and minimum ratings which lie outside the
functional limits of the processor. Only within specified operation limits, can
functionality and long-term reliability be expected.
functionality and long-term reliability be expected.
At conditions outside functional operation condition limits, but within absolute
maximum and minimum ratings, neither functionality nor long-term reliability can be
expected. If a device is returned to conditions within functional operation limits after
having been subjected to conditions outside these limits, but within the absolute
maximum and minimum ratings, the device may be functional, but with its lifetime
degraded depending on exposure to conditions exceeding the functional operation
condition limits.
maximum and minimum ratings, neither functionality nor long-term reliability can be
expected. If a device is returned to conditions within functional operation limits after
having been subjected to conditions outside these limits, but within the absolute
maximum and minimum ratings, the device may be functional, but with its lifetime
degraded depending on exposure to conditions exceeding the functional operation
condition limits.