Intel AT80604004884AA Manuale Utente
Intel® Xeon® Processor 7500 Datasheet, Volume 1
171
Features
7.5.8
Feature Data
This section provides information on key features that the platform may need to
understand without powering on the processor.
understand without powering on the processor.
7.5.8.1
PCFF: Processor Core Feature Flags
This location contains a copy of results in EDX[31:0] from Function 1 of the CPUID
instruction. These details provide instruction and feature support by product family.
Writes to this register have no effect.
instruction. These details provide instruction and feature support by product family.
Writes to this register have no effect.
Example: A value of BFEBFBFFh can be found at offset 6C - 6Fh.
7.5.8.2
PFF: Processor Feature Flags
This location contains additional feature information from the processor. Writes to this
register have no effect.
register have no effect.
Note:
Bit 5 and Bit 6 are mutually exclusive (only one bit will be set).
Bits are set when a feature is present, and cleared when they are not.
7.5.8.3
APFF: Additional Processor Feature Flags
This location contains additional feature information from the processor. Writes to this
register have no effect.
register have no effect.
Offset:
6Ch-6Fh
Bit
Description
31:0
Processor Core Feature Flags
00000000h-FFFFFFFFF: Feature Flags
Offset:
70h
Bit
Description
7
Multi-Core (set if the processor is a multi-core processor)
6
Serial signature (set if there is a serial signature at offset 5B- 62h)
5
Electronic signature present (set if there is a electronic signature at 5B- 62h)
4
Thermal Sense Device present (set if an SMBus thermal sensor is on package)
3
Reserved
2
OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)
1
Core VID present (set if there is a VID provided by the processor)
0
L3 Cache present (set if there is a level-3 cache on the processor)
Offset:
71h
Bit
Description
7
Reserved
6
Intel
®
Cache Safe Technology
5
Extended Halt State (C1E)
4
Intel
®
Virtualization Technology