Cisco Cisco D9824 Advanced Multi Decryption Receiver Guida All'Installazione
Configuring System Settings
OL-29015-01
243
Firmware Version
Description
Boot5514/Boot7109
Software boot-loader version that initializes and
configures the STi5514/STi7109 device on the HDR2
(main) board. This is the master controller for the
D9824 receiver.
configures the STi5514/STi7109 device on the HDR2
(main) board. This is the master controller for the
D9824 receiver.
CPLD-5514/CPLD-7109
Software Configurable Programmable Logic Device
version attached to the STi5514/STi7109.
version attached to the STi5514/STi7109.
FP-PIC
Front panel controller version for the D9824
receiver.
receiver.
FPGA Type
The manufacturer's designation for the FPGA
device on the HDR2 (main) board.
device on the HDR2 (main) board.
FPGA ID
This value is used by the decoder software to
determine the features available in the FPGA.
determine the features available in the FPGA.
Safe SW Version
Version of the installed safe application, which
cannot be overwritten by another downloaded
application.
cannot be overwritten by another downloaded
application.
Safe FPGA Version
Version of the installed safe FPGA image, which
cannot be overwritten by another downloaded
FPGA image.
cannot be overwritten by another downloaded
FPGA image.
App Safe Limit
Indicates the version of the oldest application that
can be installed on the current unit. If this value is
zero, the oldest application limit is the Safe SW
Version. If this is greater than zero, the shown value
or older and the Safe SW Version is the limit. Older
applications will not be installed.
can be installed on the current unit. If this value is
zero, the oldest application limit is the Safe SW
Version. If this is greater than zero, the shown value
or older and the Safe SW Version is the limit. Older
applications will not be installed.
The HW Board Versions table displays the revisions, option bits, and serial numbers
of the HRD2 (main) board.
of the HRD2 (main) board.
In the APP/FPGA Downloads area, click Browse to select the new version of FPGA
or the D9824 Advanced Multi Decryption Receiver software application. The Open
dialog opens. Choose the upgrade file and click Open. Click Download to download
the selected upgrade file. File formats that can be downloaded include application
CDTs and FPGA CDTs. The State field in the Download Status area displays the
progress of the download. When the download is complete, a Successfully
Completed message is displayed at the top of the Versions page.
or the D9824 Advanced Multi Decryption Receiver software application. The Open
dialog opens. Choose the upgrade file and click Open. Click Download to download
the selected upgrade file. File formats that can be downloaded include application
CDTs and FPGA CDTs. The State field in the Download Status area displays the
progress of the download. When the download is complete, a Successfully
Completed message is displayed at the top of the Versions page.
Note: For application downloads, once the download is complete, the D9824 receiver
will reboot automatically. For FPGA downloads, you must click Reboot Receiver in
the Service Actions page (Support > Service Actions) to manually reboot the D9824
receiver and complete the download. This is to facilitate the typical case in which the
user intends to flash the FPGA file (no auto reboot) followed by an APP download
(auto reboot).
will reboot automatically. For FPGA downloads, you must click Reboot Receiver in
the Service Actions page (Support > Service Actions) to manually reboot the D9824
receiver and complete the download. This is to facilitate the typical case in which the
user intends to flash the FPGA file (no auto reboot) followed by an APP download
(auto reboot).