NEC PD78P214 Manuale Utente
208
µ
PD78214 Sub-Series
7.4.4 Operation of 8-Bit Timer 3 (TM3)
(1) Basic operation
Eight-bit timer/counter 3 performs count operation by counting up with the count clock specified by the higher
4 bits of prescaler mode register 0 (PRM0).
4 bits of prescaler mode register 0 (PRM0).
When the RESET signal is applied, TM3 is cleared to 00H, and count operation stops.
Bit 7 (CE3) of timer control register 0 (TMC0) is used to enable/disable count operation. (The higher 4 bits of
the TMC0 register are used to control the operation of 8-bit timer/counter 3.) When the CE3 bit is set to 1 by
software, TM3 is cleared to 00H by the first count clock pulse, then count-up operation starts. When the CE3
bit is reset to 0, TM3 is cleared to 00H by the next count clock pulse, then coincide with signal generation stops.
If the CE3 bit is set to 1 when the CE3 bit is already set to 1, TM3 is not cleared, but continues count operation.
the TMC0 register are used to control the operation of 8-bit timer/counter 3.) When the CE3 bit is set to 1 by
software, TM3 is cleared to 00H by the first count clock pulse, then count-up operation starts. When the CE3
bit is reset to 0, TM3 is cleared to 00H by the next count clock pulse, then coincide with signal generation stops.
If the CE3 bit is set to 1 when the CE3 bit is already set to 1, TM3 is not cleared, but continues count operation.
Fig. 7-125 Basic Operation of 8-Bit Timer 3 (TM3)
(a) Count start
→ count stop → count start
(b) When the CE3 bit is set to 1 again after count operation starts
Count clock
Count starts
CE3
←1
CE3
←1
Count starts
0H
1H
TM3
2H
3H
4H
5H
0H
1H
2H
0FH
10H
Count clock
Count starts
Count stops
CE3
←1
CE3
←0
TM3
11H
0H
0H
1H
Count starts
CE3
←1