NEC PD750004 Manuale Utente

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CHAPTER 4 INTERNAL CPU FUNCTIONS

4.1 Mk I MODE/Mk II MODE SWITCH FUNCTIONS

4.1.1 Differences between Mk I Mode and Mk II Mode

The CPU of the µPD750008 subseries has two modes (Mk I mode and Mk II mode) and which mode is

used is selectable. Bit 3 of the stack bank selection register (SBS) determines the mode.

• Mk I mode:

This mode has the upward compatibility with the µPD75008 subseries.

It can be used in the 75XL CPUs having a ROM of up to 16KB.

• Mk II mode: This mode is not compatible with the µPD75008 subseries.

It can be used in all 75XL CPUs, including those having a ROM of 16KB or more.

Table 4-1 shows the differences between Mk I mode and Mk II mode.

Table 4-1. Differences between Mk I Mode and Mk II Mode

Mk I mode

Mk II mode

Number of stack bytes in a subroutine instruction

2 bytes

3 bytes

BRA !addr1 instruction

Undefined operation

Normal operation

CALLA !addr1 instruction

CALL !addr instruction

3 machine cycles

4 machine cycles

CALLF !faddr instruction

2 machine cycles

3 machine cycles

Caution Mk II mode is for maintaining a software compatibility with products in the 75X series or

75XL series whose program memory is more than 24K bytes.

Therefore, Mk I mode is recommended for applications with a focus on the ROM efficiency

or speed.