Quectel Wireless Solutions Company Limited 201807EG95NA Manuale Utente
LTE Module Series
EG95 Hardware Design
EG95_Hardware_Design 45 / 81
3.13.
SPI Interface
SPI interface of EG95 acts as the master only. It provides a duplex, synchronous and serial
communication link with the peripheral devices. It is dedicated to one-to-one connection, without chip
select. Its operation voltage is 1.8V with clock rates up to 50MHz.
The following table shows the pin definition of SPI interface.
Table 15: Pin Definition of SPI Interface
Pin Name
Pin No. I/O
Description
Comment
SPI_CLK
26
DO
Clock signal of SPI interface
1.8V power domain
SPI_MOSI
27
DO
Master output slave input of SPI
interface
interface
1.8V power domain
SPI_MISO
28
DI
Master input slave output of SPI
interface
interface
1.8V power domain
The following figure shows a reference design of SPI interface with peripherals.
SPI_MISO
SPI_MOSI
SPI_CLK
Module
SPI_CLK
SPI_MISO
SPI_MOSI
Peripherals
Figure 27: Reference Circuit of SPI Interface with Peripherals
3.14.
Network Status Indication
The module provides one network indication pin: NETLIGHT. The pin is used to drive a network status
indication LED.
The following tables describe the pin definition and logic level changes of NETLIGHT in different network
status.