ZTE Corporation ZM8300G Manuale Utente
ZTE ZM8300G Module Hardware User Manual
<All rights reserved. No distribution without prior permission of ZTE.>
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Figure 3-16 ADC Interface Circuit
When the two pins are used to sample ADC analogs (for example, to sample the battery
voltage), ensure that the input voltage is within the allowed range. It is recommended that a
bleeder circuit be designed and a bleeder resistor of hundreds of kilo-ohms be used, with the
goal of reducing the leakage current. In addition, provide the designed circuit with ESD
protection. To improve the sampling accuracy, ensure a good reference ground for the ADC
PCB circuit.
ZM8300
VSYS
MPP
( crrent sink )
Figure 3-17 MPP Indicator Lighting
Provide ESD protection when using the interface to drive an LED indicator.
3.12 JTAG Interface
3.12.1 Pin Description
The joint test action group (JTAG) interface of the ZM8300G module complies with
ANSI/IEEE Std.1149.1-1990. Table 3-11 describes JTAG signals.
Table 3-11 Description of the JTAG Signals
Pin
Signal
I/O
Description
T1
JTAG_PS_HOLD
-
Power setup holding signal
T2
JTAG_TDI
DI-PU
JTAG debug data input signal
T3
JTAG_TMS
DI-PU
JTAG debug mode selection
signal
T4
JTAG_TDO
Z
JTAG debug data output signal
T5
JTAG_TCK
DI-PU
JTAG debug clock signal
T6
JTAG_RESOUT_N
DO
JTAG reset output signal