ZTE Corporation ZM8300G Manuale Utente
ZTE ZM8300G Module Hardware User Manual
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ZM8300
I
2
C
_SCL
I
2
C
_SDA
IC 1
IC n
…
…
…
CLK
DATA
VIO
CLK
DATA
Figure 3-12 I
2
C Reference Circuit
3.7 GPIO Interfaces
In addition to BLSP pins, which can be configured as general-purpose input/output (GPIO)
interfaces, reserved pins and some dedicated pins of the ZM8300G module can also be
multiplexed as GPIO interfaces. For details, see Table 3-7. Customers can use these IO
interfaces for control functions. By default, all IO interfaces of the ZM8300G module are PD.
The multiplexing functions of the reserved pins are being developed.
Table 3-7 ZM8300G GPIO Resources
Multiplexed as GPIO Interfaces
Pin
Signal
I/O
Description
Remarks
34
RESERVED
B
GPIO
VIO (1.8 V) power
domain
35
RESERVED
26 to 29
PCM audio interface
5 to 8
Control
signal
interface