Getac Technology Corporation V110GD Manuale Utente
© 2011 Microchip Technology Inc.
Preliminary
DS61168C-page 173
PIC32MX1XX/2XX
17.0
INTER-INTEGRATED
CIRCUIT™ (I
CIRCUIT™ (I
2
C™)
The I
2
C module provides complete hardware support
for both Slave and Multi-Master modes of the I
2
C serial
communication standard.
illustrates the
I
2
C module block diagram.
Each I
2
C module has a 2-pin interface: the SCLx pin is
clock and the SDAx pin is data.
Each I
Each I
2
C module offers the following key features:
• I
2
C interface supporting both master and slave
operation
• I
2
C Slave mode supports 7-bit and 10-bit addressing
• I
2
C Master mode supports 7-bit and 10-bit
addressing
• I
2
C port allows bidirectional transfers between
master and slaves
• Serial clock synchronization for the I
2
C port can
be used as a handshake mechanism to suspend
and resume serial transfer (SCLREL control)
and resume serial transfer (SCLREL control)
• I
2
C supports multi-master operation; detects bus
collision and arbitrates accordingly
• Provides support for address bit masking
Note 1:
This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 24. “Inter-
Integrated Circuit™ (I
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 24. “Inter-
Integrated Circuit™ (I
2
C™)”
(DS61116)
in the “PIC32 Family Reference Manual”,
which is available from the Microchip web
site (
which is available from the Microchip web
site (
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
described in this section may not be
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.