Getac Technology Corporation V110GD Manuale Utente

PIC32MX1XX/2XX

DS61168C

-page 50

Prelimina

2011 Microchip T

echnolo

gy Inc.

TABLE 4-8:

SPI2 AND SPI2 REGISTER MAP

(1)

irtual Address

(BF80_#

)

Regis

ter

Bit Range

Bits

All

set

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

5800 SPI1CON

31:16 FRMEN FRMSYNC FRMPOL MSSEN FRMSYPW

FRMCNT<2:0>

MCLKSEL

—

SPIFE

ENHBUF 0000

15:0

—

SIDL

DISSDO

MODE32 MODE16

SMP

CKE

SSEN

CKP

MSTEN

DISSDI

STXISEL<1:0>

SRXISEL<1:0>

0000

5810 SPI1STAT

31:16

—

RXBUFELM<4:0>

—

TXBUFELM<4:0>

0000

15:0

—

FRMERR SPIBUSY

—

SPITUR

SRMT

SPIROV

SPIRBE

—

SPITBE

—

SPITBF

SPIRBF 0008

5820 SPI1BUF

31:16

DATA<31:0>

0000

15:0

0000

5830 SPI1BRG

31:16

—

0000

15:0

—

BRG<8:0>

0000

5840 SPI1CON2

31:16

—

0000

15:0

SPI

SGNEXT

—

FRM

ERREN

SPI

ROVEN

SPI

TUREN

IGNROV

IGNTUR

AUDEN

—

AUD-

MONO

—

AUDMOD<1:0>

0000

5A00 SPI2CON

31:16 FRMEN FRMSYNC FRMPOL MSSEN FRMSYPW

FRMCNT<2:0>

MCLKSEL

—

SPIFE

ENHBUF 0000

15:0

—

SIDL

DISSDO

MODE32 MODE16

SMP

CKE

SSEN

CKP

MSTEN

DISSDI

STXISEL<1:0>

SRXISEL<1:0>

0000

5A10 SPI2STAT

31:16

—

RXBUFELM<4:0>

—

TXBUFELM<4:0>

0000

15:0

—

FRMERR SPIBUSY

—

SPITUR

SRMT

SPIROV

SPIRBE

—

SPITBE

—

SPITBF

SPIRBF 0008

5A20 SPI2BUF

31:16

DATA<31:0>

0000

15:0

0000

5A30 SPI2BRG

31:16

—

0000

15:0

—

BRG<8:0>

0000

5A40 SPI2CON2

31:16

—

0000

15:0

SPI

SGNEXT

—

FRM

ERREN

SPI

ROVEN

SPI

TUREN

IGNROV

IGNTUR

AUDEN

—

AUD

MONO

—

AUDMOD<1:0>

0000

Legend:

= unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

All registers in this table except SPIxBUF have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See

Section 11.2 “CLR, SET and INV

Registers”

for more information.